1. Field of the Invention
Embodiments of this invention relate generally to computers, and, more particularly, to the processing and maintenance of a cache.
2. Description of Related Art
Processors generally use memory operations to move data to and from memory. The term “memory operation” refers to an operation that specifies a transfer of data between a processor and memory (or cache). Load memory operations specify a transfer of data memory to the processor, and store memory operations specify a transfer of data from the processor to memory.
In some processors, store memory operations are not required to occur immediately upon a store instruction being completed or retired. That is, a load/store unit within the processor maintains a queue of retired instructions that are handled as resources become available. It is desirable that these retired store instructions will eventually store their data within a corresponding cache entry, as opposed to main memory, for the sake of speed. Thus, each of these retired store instructions is permitted to initiate a request that the corresponding line of memory be retrieved and stored in the cache in preparation of the data being stored therein.
However, since there may be numerous retired store operations simultaneously present in the queue, each requesting a line of memory for the cache, conflicts may arise. For example, a line of memory in the cache that was requested by store operation A may be evicted from the cache when store operation B requests a conflicting line of memory. Store operation A then seeks to reacquire the line of memory that it needs, causing the line of memory requested by store operation B to be evicted from the cache. The process continues unabated until the conflict is removed by completing one of the store operations, A or B. The intervening thrashing of the cache; however, is inefficient, wasting the resources and power of the processor.